Ladder Logic

“Ladder” diagrams

Ladder diagram adalah kumpulan simbol-simbol skematik yang khusus digunakan dalam dokumentasi industri. Disebut “ladder” diagram dikarenakan simbol-simbolnya tersusun seperti tangga dengan dua garis vertikal (menyimbolkan power supply) dan memiliki banyak “rungs” (garis horizontal) yang merepresentasikan rangkaian pengontrol. Jika kita ingin membuat suatu ladder diagram yang sederhana untuk mengontrol sebuah lampu oleh sebuah saklar, maka bentuknya akan menjadi seperti berikut :

“L1” dan “L2” menunjukkan pada dua poles dari sumber tegangan 120 VAC. Biasanya L1 adalah + 120 V dan L2 adalah ground. Terkadang pada PLC digunakan juga sumber tegangan selain 120 VAC, tetapi hal ini tidak akan mempengaruhi operasi dari ladder diagram ini.

Fungsi Digital Logic

Kita dapat membuat suatu fungsi logika yang sederhana untuk mengendalikan suatu lampu menggunakan beberapa saklar. Jika digunakan notasi standar biner untuk lampu dan saklar (0 untuk OFF dan 1 untuk ON), maka ladder diagram berikut merepresentasikan suatu rangkaian OR.

Lampu akan menyala jika saklar A atau saklar B dikontakkan.

Kita juga dapat membuat ladder diagram untuk merepresentasikan suatu rangkaian AND sebagai berikut.

Logika untuk invers atau NOT direpresentasikan menggunakan normally-closed contact sebagai berikut.

Pada rangkaian diatas, lampu menyala saat saklar A tidak ditekan.

Jika kita menggabungkan rangkaian OR dan invert maka akan diperoleh suatu rangkaian NAND. Sebagai berikut :

Lampu hanya akan menyala jika saklar A dan saklar B tidak ditekan. Jika salah satu saklar saja ditekan, maka lampu akan padam.

Dengan prinsip yang sama, kita dapat membuat rangkaian NOR sebagai berikut.

Beberapa kesimpulan yang perlu diperhatikan : Saklar yang disusun paralel ekivalen dengan rangkaian OR Saklar yang disusun seri ekivalen dengan rangkaian AND Saklar Normally-closed ekivalen dengan rangkaian NOT (inverter)

Kita dapat mengkombinasikan berbagai fungsi logika untuk menyusun rangkaian yang kita inginkan. Pada rangkaian berikut kita membuat rangkaian Exclusive-OR dengan mengkombinasikan rangkaian AND, OR dan NOT.

Untuk membuat rangkaian Exclusive-OR ini, kita membuat dua contact per input. Dua saklar A pada ladder diagram secara fisik menunjukkan pada saklar yang sama, demikian juga saklar B. Hal ini dibenarkan dalam ladder diagram. Pada ladder diagram, tidak ada batasan sebuah saklar dapat digunakan berulang kali dalam rungs. Jadi jika Anda melihat label yang sama untuk beberapa saklar pada ladder diagram, ini terhubung pada fisik mekanik yang sama.

Jika kita ingin meng-invert-kan output dari suatu saklar, kita dapat juga menggunakan relay. Rangkaian berikut memberikan contoh pemakaian relay dalam pembuatan ladder diagram yang berfungsi sebagai AND

Kita menyebut relay sebagai ”Control Relay 1”, atau CR1.

Konstruksi Ladder Diagram [PSIM]

1. Semua saklar harus bekerja horizontal2. Jumlah saklar pada setiap rung terbatas3. Hanya satu output terkoneksi ke suatu grup saklar4. Hanya ada satu cabang untuk setiap rung5. Aliran dari kiri ke kanan6. Tiap output hanya digunakan satu kali dalam suatu program7. Tidak ada saklar yang ditempatkan di kanan dari suatu output

Catatan : keluar dari program ke layar Main Menu dan kembali ke sub-program akan membersihkan data simulasi dan Anda dapat memulai kembali program Anda.

PSIM Operations Manual

Operation

Psim has been designed to minimize the amount of typing required on the part of the student. To this end, most instructions are accessed by way of the IBM function keys

F1 through F10. Throughout this documentation, a specific function key will be referred to as [F1], [F8] etc. The student should note the definition of each function key is displayed on the bottom 2 lines of the colour display. Function keys may take on different definitions depending upon what operation is currently being executed. Students are encouraged to maintain a watchful eye on the status lines to see how the [Fn] definitions change thus minimizing the frustration due to miss-hit keys. The various functions are grouped together in logical order ensuring a minimum number of key strokes.

Typing <PSIM> at the DOS prompt will result in the start-up of the PSIM simulation program. After a period of initialization the main PSIM introductory screen will appear which contains the copyright notice for the PSIM program and an animation of the PSIM logo. After the animation has completed one cycle, a momentary prompt will appear stating: 'Press Any Key To Continue'. Pressing a key at any time while the introductory screen is showing will cause the main PSIM menu to be displayed. The animation will continue, but the menu which lists the available choice of process simulations will remain displayed.

To select one of the process simulations, simply press the number key on your keyboard that corresponds to the menu entry you desire.

 Process Simulation Screens

On each of the process screens the student will notice that beside each piece of equipment e.g.. The electric motor in the silo simulation is a label describing the device i.e.. "Motor" and a PLC I/O address associated with that device i.e.. "O:1/00". When writing a program to control pieces of hardware always ensure that the correct I/O address is used. Please note that all addresses used in this simulation software use the following convention; the first character is either an "I" (input) or an "O" (output), next is a ":" followed by a single digit, a "/" and finally two digits. This naming convention must be adhered to if the devices are to be controlled properly.

Working Through The Menus

First level [Fn] key definitions

Once any of the processes have been selected a new animated process will be displayed. On the status lines of any of these processes will appear the first of a series of layers of [Fn] key definitions. With only minor exceptions all these definitions are the same regardless of which process is being used. Fig. 2 is a representative sample.

Fig. 2 Process Simulation Menu

[F1],[F2],[F3]   These [Fn] keys represent normally open(NO) or normally closed(NC) momentary switches which may be used at the programmers discretion for such function as START and STOP buttons to control the operation of the process. In some

processes there are two such switches and in others there are three.

[F5]Rung editor:

Used to switch from the process display mode to the program writing mode. Programs are written in the program creation mode and the tested out in the process display mode.

[F6]Exit (Esc)

Exit back to the main menu

[F7]Toggle Table

Successive taps on this function key will display different areas of the PLC data table on the screen beside the process. This function is useful as a program debugging tool

Rung Editor

This function is invoked whenever program creation or modification is required. Do not forget to "SAVE" the program whenever any changes are made to the logic. Figs 3 through Fig. 8 depict the [Fn] key definitions used in the Rung Editor mode.

Fig. 3 Main Editor Menu

[F1], [F2]

Append, Insert Rung

Used to Append a new rung after the current cursor position or to Insert a new rung ahead of the current cursor position.

[F3]Modify Rung

Used to modify an existing rung.(Fig. 8)

[F5]Delete Rung

Used to delete a complete rung from a program.

[F6]Un-Del Rung

Used to paste back into the program a rung that had previously been deleted. Used in combination with [F5] rungs may be moved a rung, in total, from one area of a program to an other.

[F7]Program Utility

Sub-Menu used to save or to retrieve user programs.

[F8]Clear Memory

Used to completely erase program memory so that a new program may be written.

[F10] Exit Editor Exit this menu, back to process

mode.

 

Fig. 4 Input Instruction Menu

The menu in Fig 4 is activated whenever Append rung or Insert Rung is requested. The [Fn] definitions for this menu are:

[F1], [F2]

XIC, XIOBasic input instructions( see Relay Logic Instructions).

[F3], [F4]

Branch Start, close

Used together to form a series of parallel instructions. Parallel instructions form a logical OR operation.

[F8]Output Instructions

Sub-menu containing all output instructions.

[F10] Exit back to the main edit menu.

Fig. 5 Output Instruction Menu

The menu in Fig. 5 is activated whenever an output instruction is requested. The [Fn] definitions for this menu are as follows (these instructions are more fully described in "Relay Logic Instructions and Timers and Counters"):

[F1] OTE Output energize.

[F2] OTL Output latch

[F3] OTU Output unlatch.

[F4] TON Timer on delay

[F5] RTO Retentive timer

[F6] CTU Count up counter

[F7] CTD Count down counter

[F8] ResReinitialize counters and retentive timers

[F10]Prev-Menu

Return to main edit menu.

Fig. 6 Word Compare Menu

The menu in Fig. 6 is activated whenever a Compare Instruction is requested in the main edit menu Fig. 4. The [Fn] definitions for this menu are as follows (these instructions are more fully described in "Word Compare Instructions"):

[F1] EQUWord value is equal in value to a specified immediate value

[F2] NEQWord value is not equal to a specified immediate value.

[F3] GRTWord value is greater than a specified immediate value

[F4] LESWord value is less than a specified immediate value.

[F5] GEQWord value is greater than or equal to a specified immediate value.

[F6] LEQWord value is less than or equal to a specified immediate value.

[F8]Output Instructions

Used to select the output instruction menu

[F10] Prev. MenuMenu Used to return to the main Edit menu

Fig. 7 Utility Menu

The utility menu in Fig. 7 is activated whenever the unity request is made (Fig. 3). This menu provides basic functionality for program storage and retrieval. Program names are not required for these files. File names are assigned at storage time and these same names are used upon retrieval.

[F1]Save Program

Used to save a program so that it may be retrieved at a later date. File names are assigned for each process. Files are saved in the default directory.

[F2]Load Program

Used to re-load a program that has already been saved ([F1]).

[F3]Print Program

Used to print a program to the DOS Device PRN:

[F4]Program Directory

Used to display a directory of ladder programs saved to date.

[F10] Exit Utility Exit back to main edit menu.

Fig. 8 Rung Modification Menu

The menu in Fig. 8 is activated whenever a modify rung request is made from (Fig. 3). Modification implies that the rung already exists, and that some minor changes are required. The [Fn] key definitions for this menu are as follows:

[F1],[F2]Append, Insert Instruction

Used to Append (Insert) a new instruction to the right (Left) of the instruction under the cursor.

[F3]Delete Instruction

Used to Delete the instruction under the cursor.

[F4]Change Instruction

Used to Change the instruction under the cursor. Modifications include changing the address of the instruction or changing the instruction itself.

[F10]Accept Instruction

Used to accept the rung once all of the modifications have been completed

Relay Logic Instructions and their Mnemonics

E xamine I f C losed (XIC) O utput L atch (OTL)

E xamine I f O pen (XIO) O utput U nlatch (OUT)

O utput E nergize (OTE) Branching

Use these instructions to monitor the status of bits in the data table, such as input bits and timer control word bits, and to control the state of bits in the data table, such as output bits. In the following discussion, we use an input device in our examples.

Examine if Closed (XIC)

Ketika divais pengontrol on, saklar adalah closedKetika divais pengontrol off, saklar adalah open

When an input device completes its circuit the input terminal wired to the device indicates an on state. This on state is reflected in memory for the corresponding bit. When the processor finds an XIC instruction having the same address, it determines that the input device is on or closed and sets the instruction logic to true. When the input device no longer completes its circuit, the processor sets the logic for this instruction to false.

If the rung containing this instruction also contains an output instruction, the output instruction is enabled when the XIC instruction is true (input closed); a non-retentive output instruction is disabled when the XIC instruction is false (input open).

Examine if Open (XIO)

Ketika divais pengontrol on, saklar adalah openKetika divais pengontrol off, saklar adalah closed

When an input device no longer completes its circuit, the input terminal wired to the device indicates an off state. This off state is reflected in memory for the corresponding bit. When the processor finds an XIO instruction having the same address, the processor determines that the input is off (input open) and sets the instruction logic to true. When the input device completes its circuit, the processor sets the logic for this instruction to false.

If the rung containing this instruction also contains an output instruction, the output instruction Is enabled when the XIO instruction is true (input open); the non retentive output instruction is disabled when the instruction is false (input closed).

Out Energize (OTE)

Use OTE instructions to set a particular bit in memory. If the address of the bit corresponds to the address of an output module terminal, the output device wired to this terminal is energized. The enabled status of this bit is determined by rung logic in your application program.

If a true logic path is established with the input instructions in the rung, the OTE instruction is enabled. If a true logic path cannot be established or rung conditions go

false, the OTE instruction is disabled. When rung conditions become false, the associated output device de-energizes.

An OTE instruction is similar to a relay coil. The instruction is controlled by the preceding instructions in its programmed rung. A relay coil is controlled by contacts in its hard-wired rung. A complete logic path of true preconditions is similar to a complete electrical circuit of closed contacts.

Your program can examine a bit controlled by these instructions as often as necessary.

 

Output Latch and Output Unlatch (OTL), (OTU)

Output latch and output unlatch instructions are retentive output instructions. They are usually used in a pair for any data table bit they control.

When you assign an address to the OTL instruction that corresponds to the address of an output module terminal, the output device wired to this terminal is energized when the bit in memory is set (turned on or enabled). The enabled status of this bit is determined by the rung logic preceding the OTL and OTU instructions.

If a true logic path is established with the input instructions in the rung, the OTL instruction is enabled. If a true logic path is not established and the corresponding bit in memory was not previously set, the OTL instruction is not enabled. However, if a true logic path was previously established, the bit in memory is latched on and remains on, or enabled, even after the rung conditions go false.

An OTU instruction with the same address as the OTL instruction resets (disables or turns off) the bit in memory. When a true logic path is established, the OTU instruction resets its corresponding bit in memory.

Your program can examine an output controlled by OTL and OTU instructions as often as necessary.

Branching

Use branching to form parallel logic in your application program.

Your program may have two levels of parallel branches for input instructions, only a single level of output branching is permitted.

Example of nested Branching

When:

1. I:300 is true, scan continues to I:303 2. I:300 is false , scan continues to I:301 3. I:301 is true, scan continues to I:302 4. I:302 is true, scan continues to I:303 5. I:303 is true, scan continues to I:304

The processor scans rungs from left to right and from top to bottom. When the processor finds an input instruction whose logic is false, it scans the remainder of the rung as if it were false.

Input Branching

Use an input branch in your application program to permit more than one combination of input conditions to form parallel branches (OR-logic conditions). If at least one of these parallel branches forms a true logic path, the rung logic is enabled. If none of the parallel branches forms a true logic path, rung logic is not enabled, and the output instruction logic will not be true (output is not energized).

Where possible, we recommend that you place series input instructions ahead of branching instructions to reduce program scan time.