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    Ladder Logic

    Ladder diagrams

    Ladder diagram adalah kumpulan simbol-simbol skematik yang khusus

    digunakan dalam dokumentasi industri. Disebut ladder diagram dikarenakan

    simbol-simbolnya tersusun seperti tangga dengan dua garis vertikal

    (menyimbolkanpower supply) dan memiliki banyak rungs (garis horizontal)

    yang merepresentasikan rangkaian pengontrol.

    Jika kita ingin membuat suatu ladder diagram yang sederhana untuk

    mengontrol sebuah lampu oleh sebuah saklar, maka bentuknya akan menjadiseperti berikut

    !" dan !# menunjukkan pada dua poles dari sumber tegangan "#$ %&'.

    iasanya !" adalah "#$ % dan !# adalah ground. *erkadang pada +!'

    digunakan juga sumber tegangan selain "#$ %&', tetapi hal ini tidak akan

    mempengaruhi operasi dari ladder diagramini.

    Fungsi Digital Logic

    ita dapat membuat suatu ungsi logika yang sederhana untuk mengendalikan

    suatu lampu menggunakan beberapa saklar. Jika digunakan notasi standar

    biner untuk lampu dan saklar ($ untuk // dan " untuk 0), maka ladder

    diagramberikut merepresentasikan suatu rangkaian 1.

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    !ampu akan menyala jika saklar & atau saklar dikontakkan.

    ita juga dapat membuat ladder diagram untuk merepresentasikan suatu

    rangkaian &0D sebagai berikut.

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    !ogika untuk invers atau 0* direpresentasikan menggunakan normally-

    closed contactsebagai berikut.

    +ada rangkaian diatas, lampu menyala saat saklar & tidak ditekan.

    Jika kita menggabungkan rangkaian 1 dan invert maka akan diperoleh suatu

    rangkaian 0&0D. 2ebagai berikut

    !ampu hanya akan menyala jika saklar & dan saklar tidak ditekan. Jika salah

    satu saklar saja ditekan, maka lampu akan padam.

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    Dengan prinsip yang sama, kita dapat membuat rangkaian 01 sebagai

    berikut.

    eberapa kesimpulan yang perlu diperhatikan

    2aklar yang disusun paralel ekivalen dengan rangkaian 1

    2aklar yang disusun seri ekivalen dengan rangkaian &0D

    2aklarNormally-closedekivalen dengan rangkaian 0* (inverter)

    ita dapat mengkombinasikan berbagai ungsi logika untuk menyusun

    rangkaian yang kita inginkan. +ada rangkaian berikut kita membuat rangkaian

    345lusive-1 dengan mengkombinasikan rangkaian &0D, 1 dan 0*.

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    6ntuk membuat rangkaian 345lusive-1 ini, kita membuat dua 5onta5t per

    input. Dua saklar & pada ladder diagramse5ara isik menunjukkan pada saklar

    yang sama, demikian juga saklar . 7al ini dibenarkan dalam ladder diagram.+ada ladder diagram, tidak ada batasan sebuah saklar dapat digunakan

    berulang kali dalam rungs. Jadi jika &nda melihat label yang sama untuk

    beberapa saklar pada ladder diagram, ini terhubung pada isik mekanik yang

    sama.

    Jika kita ingin meng-invert-kan output dari suatu saklar, kita dapat juga

    menggunakan relay. 1angkaian berikut memberikan 5ontoh pemakaian relay

    dalam pembuatan ladder diagramyang berungsi sebagai &0D

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    ita menyebut relay sebagai 'ontrol 1elay ", atau '1".

    Konstruksi Ladder Diagram [PSIM]

    ". 2emua saklar harus bekerja horizontal

    #. Jumlah saklar pada setiap rung terbatas

    8. 7anya satu output terkoneksi ke suatu grup saklar

    4. Hanya ada satu cabang untuk setiap rung

    9. &liran dari kiri ke kanan

    6. Tiap output hanya digunakan satu kali dalam suatu program

    :. *idak ada saklar yang ditempatkan di kanan dari suatu output

    'atatan keluar dari program ke layar ;ain ;enu dan kembali ke sub-

    program akan membersihkan data simulasi dan &nda dapat memulai kembali

    program &nda.

    PSIM Operations Manual

    Operation

    Psim has been designed to minimize the amount of typing required on the part of thestudent. To this end, most instructions are accessed by way of the IBM function keys

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    F through F!. Throughout this documentation, a specific function key wi"" bereferred to as #F$, #F%$ etc. The student shou"d note the definition of each functionkey is disp"ayed on the bottom & "ines of the co"our disp"ay. Function keys may takeon different definitions depending upon what operation is current"y being e'ecuted.(tudents are encouraged to maintain a watchfu" eye on the status "ines to see howthe #Fn$ definitions change thus minimizing the frustration due to miss)hit keys. The

    *arious functions are grouped together in "ogica" order ensuring a minimum numberof key strokes.

    Typing +P(IM at the -( prompt wi"" resu"t in the start)up of the P(IM simu"ationprogram. /fter a period of initia"ization the main P(IM introductory screen wi"" appearwhich contains the copyright notice for the P(IM program and an animation of theP(IM "ogo. /fter the animation has comp"eted one cyc"e, a momentary prompt wi""appear stating0 1Press /ny 2ey To 3ontinue1. Pressing a key at any time whi"e theintroductory screen is showing wi"" cause the main P(IM menu to be disp"ayed. Theanimation wi"" continue, but the menu which "ists the a*ai"ab"e choice of processsimu"ations wi"" remain disp"ayed.

    To se"ect one of the process simu"ations, simp"y press the number key on yourkeyboard that corresponds to the menu entry you desire.

    Process Simulation Screens

    n each of the process screens the student wi"" notice that beside each piece ofequipment e.g.. The e"ectric motor in the si"o simu"ation is a "abe" describing thede*ice i.e.. 4Motor4 and a P53 I6 address associated with that de*ice i.e.. 406!!4.7hen writing a program to contro" pieces of hardware a"ways ensure that the correctI6 address is used. P"ease note that a"" addresses used in this simu"ation softwareuse the fo""owing con*ention8 the first character is either an 4I4 9input: or an 449output:, ne't is a 404 fo""owed by a sing"e digit, a 464 and fina""y two digits. This namingcon*ention must be adhered to if the de*ices are to be contro""ed proper"y.

    Working Through The Menus

    First level [Fn] ke de!initions

    nce any of the processes ha*e been se"ected a new animated process wi"" bedisp"ayed. n the status "ines of any of these processes wi"" appear the first of aseries of "ayers of #Fn$ key definitions. 7ith on"y minor e'ceptions a"" these definitionsare the same regard"ess of which process is being used. Fig. & is a representati*esamp"e.

    Fig. 2 Process Simulation Menu

    #F$,#F&$,#F;$ These #Fn$ keys representnorma""y open9

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    processes there are two suchswitches and in others there arethree.

    #F>$

    =ung

    editor0

    ?sed to switch from the processdisp"ay mode to the programwriting mode. Programs are

    written in the program creationmode and the tested out in theprocess disp"ay mode.

    #F@$A'it9Asc:

    A'it back to the main menu

    #F$Togg"eTab"e

    (uccessi*e taps on this functionkey wi"" disp"ay different areas ofthe P53 data tab"e on thescreen beside the process. Thisfunction is usefu" as a programdebugging too"

    Rung Editor

    This function is in*oked whene*er program creation or modification is required. -onot forget to 4(/CA4 the program whene*er any changes are made to the "ogic. Figs; through Fig. % depict the #Fn$ key definitions used in the =ung Aditor mode.

    Fig. 3 Main Editor Menu

    #F$,#F&$

    /ppend,Insert=ung

    ?sed to /ppend a new rung afterthe current cursor position or toInsert a new rung ahead of thecurrent cursor position.

    #F;$Modify=ung

    ?sed to modify an e'isting rung.9Fig. %:

    #F>$-e"ete=ung

    ?sed to de"ete a comp"ete rungfrom a program.

    #F@$?n)-e"=ung

    ?sed to paste back into theprogram a rung that hadpre*ious"y been de"eted. ?sed incombination with #F>$ rungs maybe mo*ed a rung, in tota", fromone area of a program to another.

    #F$Program?ti"ity

    (ub)Menu used to sa*e or toretrie*e user programs.

    #F%$3"earMemory

    ?sed to comp"ete"y eraseprogram memory so that a newprogram may be written.

    #F!$ A'it Aditor A'it this menu, back to process

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    mode.

    Fig. 4 n!ut nstruction Menu

    The menu in Fig D is acti*ated whene*er /ppend rung or Insert =ung is requested.The #Fn$ definitions for this menu are0

    #F$,

    #F&$

    EI3, EIBasic input instructions9 see

    =e"ay 5ogic Instructions:.

    #F;$,#FD$

    Branch (tart,c"ose

    ?sed together to form a seriesof para""e" instructions.Para""e" instructions form a"ogica" = operation.

    #F%$utputInstructions

    (ub)menu containing a""output instructions.

    #F!$ A'it back to the main edit menu.

    Fig. " #ut!ut nstruction Menu

    The menu in Fig. > is acti*ated whene*er an output instruction is requested. The #Fn$definitions for this menu are as fo""ows 9these instructions are more fu""y described in4=e"ay 5ogic Instructions and Timers and 3ounters4:0

    #F$ TA utput energize.

    #F&$ T5 utput "atch

    #F;$ ?T utput un"atch.

    #FD$ T< Timer on de"ay

    #F>$ =T =etenti*e timer

    #F@$ 3T? 3ount up counter

    #F$ 3T- 3ount down counter

    #F%$ =es=einitia"ize counters and retenti*etimers

    #F!$ Pre*)Menu

    =eturn to main edit menu.

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    Fig. $ Word %om!are Menu

    The menu in Fig. @ is acti*ated whene*er a 3ompare Instruction is requested in themain edit menu Fig. D. The #Fn$ definitions for this menu are as fo""ows 9theseinstructions are more fu""y described in 47ord 3ompare Instructions4:0

    #F$ A?7ord *a"ue is equa" in *a"ueto a specified immediate*a"ue

    #F&$ $ GA7ord *a"ue is greater than orequa" to a specifiedimmediate *a"ue.

    #F@$ 5A7ord *a"ue is "ess than orequa" to a specifiedimmediate *a"ue.

    #F%$ utputInstructions

    ?sed to se"ect the outputinstruction menu

    #F!$ Pre*. MenuMenu ?sed to return to themain Adit menu

    Fig. & 'tilit( Menu

    The uti"ity menu in Fig. is acti*ated whene*er the unity request is made 9Fig. ;:.This menu pro*ides basic functiona"ity for program storage and retrie*a". Programnames are not required for these fi"es. Fi"e names are assigned at storage time andthese same names are used upon retrie*a".

    #F$(a*eProgram

    ?sed to sa*e a program so that itmay be retrie*ed at a "ater date.Fi"e names are assigned for eachprocess. Fi"es are sa*ed in thedefau"t directory.

    #F&$5oadProgram

    ?sed to re)"oad a program thathas a"ready been sa*ed 9#F$:.

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    #F;$PrintProgram

    ?sed to print a program to the-( -e*ice P=

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    $'amine i! %losed ()I%*

    etika divais pengontrol on, saklar adalah 5losed

    etika divais pengontrol o, saklar adalah open

    7hen an input de*ice comp"etes its circuit the input termina" wired to the de*iceindicates an on state. This on state is ref"ected in memory for the corresponding bit.7hen the processor finds an EI3 instruction ha*ing the same address, it determinesthat the input de*ice is on or c"osed and sets the instruction "ogic to true. 7hen theinput de*ice no "onger comp"etes its circuit, the processor sets the "ogic for thisinstruction to fa"se.

    If the rung containing this instruction a"so contains an output instruction, the outputinstruction is enab"ed when the EI3 instruction is true 9input c"osed:8 a non)retenti*eoutput instruction is disab"ed when the EI3 instruction is fa"se 9input open:.

    $'amine i! Open ()IO*

    etika divais pengontrol on, saklar adalah open

    etika divais pengontrol o, saklar adalah 5losed

    7hen an input de*ice no "onger comp"etes its circuit, the input termina" wired to thede*ice indicates an off state. This off state is ref"ected in memory for thecorresponding bit. 7hen the processor finds an EI instruction ha*ing the sameaddress, the processor determines that the input is off 9input open: and sets theinstruction "ogic to true. 7hen the input de*ice comp"etes its circuit, the processorsets the "ogic for this instruction to fa"se.

    If the rung containing this instruction a"so contains an output instruction, the outputinstruction Is enab"ed when the EI instruction is true 9input open:8 the non retenti*eoutput instruction is disab"ed when the instruction is fa"se 9input c"osed:.

    Out $nergi+e (O,$*

    ?se TA instructions to set a particu"ar bit in memory. If the address of the bitcorresponds to the address of an output modu"e termina", the output de*ice wired tothis termina" is energized. The enab"ed status of this bit is determined by rung "ogic inyour app"ication program.

    If a true "ogic path is estab"ished with the input instructions in the rung, the TAinstruction is enab"ed. If a true "ogic path cannot be estab"ished or rung conditions go

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    fa"se, the TA instruction is disab"ed. 7hen rung conditions become fa"se, theassociated output de*ice de)energizes.

    /n TA instruction is simi"ar to a re"ay coi". The instruction is contro""ed by thepreceding instructions in its programmed rung. / re"ay coi" is contro""ed by contacts inits hard)wired rung. / comp"ete "ogic path of true preconditions is simi"ar to a

    comp"ete e"ectrica" circuit of c"osed contacts.

    Hour program can e'amine a bit contro""ed by these instructions as often asnecessary.

    Output Latc# and Output &nlatc# (O,L*- (O,&*

    utput "atch and output un"atch instructions are retenti*e output instructions. They areusua""y used in a pair for any data tab"e bit they contro".

    7hen you assign an address to the T5 instruction that corresponds to the addressof an output modu"e termina", the output de*ice wired to this termina" is energizedwhen the bit in memory is set 9turned on or enab"ed:. The enab"ed status of this bit isdetermined by the rung "ogic preceding the T5 and T? instructions.

    If a true "ogic path is estab"ished with the input instructions in the rung, the T5instruction is enab"ed. If a true "ogic path is not estab"ished and the corresponding bitin memory was not pre*ious"y set, the T5 instruction is not enab"ed. owe*er, if atrue "ogic path was pre*ious"y estab"ished, the bit in memory is "atched on andremains on, or enab"ed, e*en after the rung conditions go fa"se.

    /n T? instruction with the same address as the T5 instruction resets 9disab"es orturns off: the bit in memory. 7hen a true "ogic path is estab"ished, the T? instructionresets its corresponding bit in memory.

    Hour program can e'amine an output contro""ed by T5 and T? instructions asoften as necessary.

    .ranc#ing

    ?se branching to form para""e" "ogic in your app"ication program.

    Hour program may ha*e two "e*e"s of para""e" branches for input instructions, on"y asing"e "e*e" of output branching is permitted.

    A'amp"e of nested Branching

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    When+

    . I0;!! is true, scan continues to I0;!;&. I0;!! is fa"se , scan continues to I0;!;. I0;! is true, scan continues to I0;!&D. I0;!& is true, scan continues to I0;!;>. I0;!; is true, scan continues to I0;!D

    The processor scans rungs from "eft to right and from top to bottom. 7hen the

    processor finds an input instruction whose "ogic is fa"se, it scans the remainder of therung as if it were fa"se.

    Input .ranc#ing

    ?se an input branch in your app"ication program to permit more than one combinationof input conditions to form para""e" branches 9=)"ogic conditions:. If at "east one ofthese para""e" branches forms a true "ogic path, the rung "ogic is enab"ed. If none ofthe para""e" branches forms a true "ogic path, rung "ogic is not enab"ed, and the outputinstruction "ogic wi"" not be true 9output is not energized:.

    7here possib"e, we recommend that you p"ace series input instructions ahead of

    branching instructions to reduce program scan time.