gate level minimization (1st update)

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Gate Level Minimization Nugroho Adi P, S.Si, M.Sc [email protected], [email protected] http://aravir-rose.blogspot.com

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Gate level minimisation, K-Map, croate your own logic gate

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Page 1: Gate level minimization (1st update)

Gate Level Minimization

Nugroho Adi P, S.Si, M.Sc [email protected], [email protected]

http://aravir-rose.blogspot.com

Page 2: Gate level minimization (1st update)

untuk mendapatkan jumlah gerbang yang optimal

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Map Method

lebih tersturktur dari metode aljabar

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Karnaugh Map

K-map

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Karnaugh Map

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Karnaugh Map

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Karnaugh Map

m1 +m2 +m3 =x’y+xy’+xy

=x+y

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xy

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x+y

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K-map 3 variabel

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K-map 3 variabel

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m5+m7

m5 +m7 =xy’z+xyz =xz(y’+y)

=xz

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F(x,y,z) = ∑(2,3,4,5)

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F(x,y,z) = (2, 3, 4, 5)

F = x’y + xy’

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m0 dan m2

m0 +m2 =x’y’z’+x’yz’ =x’z’(y’+y)

=x’z’

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m4 dan m6

m4 + m6 = xy’z’ + xyz’ = xz’+(y’ + y)

=xz’

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F (x, y, z) = (3, 4, 6, 7)

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F(x,y,z) = ( 3, 4, 6, 7)

F = yz + xz’

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m0 +m2 +m4 +m6 F(x,y,z) = ∑(0,2,4,5,6)

F = A’C + A’B + AB’C + BC f=xy+xz’+yz+x’y’z’

!

!

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K-map 4 variabel

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K-map 4 variabel

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F(w,x,y,z) = ∑(0,1,2,4,5,6,8,9,12,13,14)

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F(w,x,y,z) = ∑(0,1,2,4,5,6,8,9,12,13,14)

F = y’ + w’z’ + xz’

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F = A’B’C’ + B’CD’ + A’BCD’ + AB’C’

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F = A’B’C’ + B’CD’ + A’BCD’ + AB’C’

F = B’D’ + B’C’ + A’CD’

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Don’t Care

minterm yang tidak penting

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Don’t Care

F(w,x,y,z) = ∑(1,3,7,11,15) d(w,x,y,z) = ∑(0,2,5)

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F(w,x,y,z) = ∑(1,3,7,11,15) d(w,x,y,z) = ∑(0,2,5)

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F(w,x,y,z) = ∑(1,3,7,11,15) d(w,x,y,z) = ∑(0,2,5)

!

F = yz + w’x’ F = yz + w’z F’ = z’ + wy’

Page 31: Gate level minimization (1st update)

1. F(x,y,z) = ∑(0,1,4,5,6); d = ∑(2,3,7) 2. F(A,B,C,D) = ∑(0,6,8,13,14); d = ∑(2,4,10) 3. F(A,B,C,D) = ∑(5,6,7,12,14,15); d = ∑(3,9,11,15) 4. F(A,B,C,D) = ∑(4,12,7,2,10); d = ∑(0,6,8)

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Build Your Own Gate

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–John Crisp

Along with the law of nature that decrees that buttered toast always lands butter-side down, there is one that states 'However many logic

gates we have, the one we want is not amongst them'.

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4-input AND gate from two 3-input AND gates.

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3-input OR gate as a 2-input gate

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3-input OR gate as a 2-input gate

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3-input AND gate as a 2-input gate

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3-input AND gate as a 2-input gate

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NAND dan NOR

the basic gates used in al l IC digital logic families

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NAND

Gerbang Universal

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Gerbang Universal

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NAND

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Gerbang Apa ini?

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Two Level Implementation

F = AB + CD

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F = AB + CD

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F = AB + CD

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F = AB + CD

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F(x,y,z) = (1,2,3,4,5,7)

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Selesai

“Dan dia hidup bahagia selama-lamanya…”