elec 2301 bjt diff

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    Differential Amplifiers:

    -

    Differential input signal is the difference of 2 input signals

    Common-mode in ut si nal is the avera e of 2 in ut

    12vvv

    Id=

    signal)(

    2

    112

    vvvIcm

    +=

    Expressing input signals v1, v2 in terms of differential and

    common-mode si nals:

    2/1 IdIcm

    vvv =

    2/2 IdIcm

    vvv +=

    1

    Pictorial representation

    2

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    Most widely-used building block in analog electronics

    Input stage of every op-amp is a differential amp

    Wh differential?

    (1) Much less sensitive to noise and interference than

    sin le-ended circuits

    (2) No need for bypass or coupling capacitors

    3

    BJT Differential Pair

    2 matched transistors , emitters connected together and

    biased by a constant current sourceI

    4

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    -

    Vary the value of the common-

    mode input voltage vcm

    As long as Q1 and Q2 remainin the active region current will

    still divide equally between Q1an 2 an t e vo tages at

    collectors will not change

    Thus differential pair does not

    respond (rejects) common-

    mo e npu s gna s

    5

    Let vB2 be grounded and let vB1= +1 V

    Q1 will be ON and conducting

    all of the current I and Q2 willbe OFF

    For Q1 to be ON (with VBE1 =

    0.7 V) emitter has to be at ~

    +0.3 V, keeping EBJ of Q2reverse biased

    6

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    Let vB2 be grounded and let vB1= -1 V

    Q1 will be OFF and Q2 will beconducting all of the current I

    Common emitter will be at -

    0.7V, EBJ of Q1 will be

    reverse biased by 0.3V

    7

    From the previous analysis the differential pair responds

    to large differential signals

    With relatively small difference voltages we are able to

    steer the entire bias current from one side to another To use the BJT differential pair as a linear amplifier we

    apply a small differential signal (a few mV), which will

    result in one of the transistor conducting a current ofI/2 +

    I; the current in the other transistor will beI/2 - I, with

    Ibeing proportional to the differential input voltage

    Output voltage taken between two collectors will be

    2IRC, which is proportional to differential input signal

    8

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    9

    TBE VV /=TEB VvvsI /1= TEB Vvvs

    I /2=

    Combinin ,

    sCE1

    E2

    ( ) TBB Vvv

    E

    E

    ei

    /

    2

    1 21

    =

    ( ) TBB Vvv

    Ei

    /

    1

    12

    1

    =EE 21

    Ei

    21

    =( ) TBB Vvv

    EEeii

    /

    21

    211

    ++

    10

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    The circuit imposes a constraint

    Therefore

    IiiEE=+

    21

    Tid VvE e

    Ii

    /1

    1

    +=

    Tid VvE e

    Ii

    /2

    1+=

    11

    A relatively small difference voltage causesIto flow

    ~ T

    12

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    Include two equal

    resistances Re in

    series with emitterso 1 an 2

    Reduced gm and

    overa ga n

    13

    -

    14

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    Assume current source is ideal; its incremental resistance will

    then be infinite

    Thus the voltage vidappears across a total resistance of2re,w ere

    2/I

    V

    I

    Vr T

    E

    T

    e==

    orrespon ng y t ere w e a s gna current e g ven y

    e

    id

    e

    r

    vi

    2=

    Thus the collector of Q1 will exhibit increment ic and the

    collector of Q2 will exhibit a current decrement ic:

    22

    id

    m

    e

    id

    ecg

    rii ===

    17

    18

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    This method of analysis is particularly useful when resistances

    are included in the emitters

    ee

    id

    e

    Rr

    vi

    22 +=

    19

    ( )( )eeid

    RrR 221 ++=

    The resistance seen between the 2 bases is equal to the

    total resistance in the emitter circuit multiplied by (+1):

    resistance reflection rule

    20

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    For small difference inputs

    21

    id

    mCC

    vgIi +=

    idv

    where2

    2 mCC

    II

    c

    =

    Thus the total voltages at the collectors will be

    21

    id

    CmCCCCCRgRIVv =

    ( )2id

    CmCCCCC

    v

    RgRIVv +=

    21

    Differential gain (taken between 2 collectors):

    Cm

    d

    CC

    dRg

    v

    vvA =

    = 21

    Single-ended gain (between 1 collector and GND):

    v 1Cm

    d

    C

    dg

    v 2==

    ( )CC

    RR=

    2

    eeee

    d

    RrRr ++ 22

    22

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    -

    EE

    C

    icm

    eEE

    C

    icmC

    R

    Rv

    rR

    Rvv

    221

    +=

    EE

    C

    icmC

    R

    Rvv

    22

    =

    23

    Common-mode voltage vo = (vC1- vC2) = 0

    => common-mode gain = 0

    For sin le-ended out ut, common-mode ain

    EE

    C

    cm

    RRA

    2=

    CmdRgA

    2

    1=

    -

    EEm

    cm

    d RgA

    ACMRR =

    Expressed in decibelsd

    A

    ACMRR log20=

    24

    cm

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    The differential amp uses transistors with =100. Evaluate (a)

    id ,

    gain (neglect the effect or ro) and (c) the CMRR, in dB.

    25

    (a) Each transistor is biased at an emitter current of 0.5 mA. Thus25mVV

    The input differential resistance

    ==== 505.0

    21

    mAIrr

    E

    T

    ee

    (b) Voltage gain from signal source to bases of Q1 and Q2:

    eeid

    Rv 40

    Voltage gain from bases to output

    RRvsigidsig

    .4055

    =++

    =+

    =

    ( ) ( )VV

    Rr

    R

    v

    v

    Ee

    C

    id

    o /5010150502

    102

    2

    23=

    +

    =

    +=

    Overall differential voltage gain:

    VVv

    v

    v

    v

    v

    vA oido

    d/40508.0 ====

    26

    idsigsig

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    (c) ACMRR dlo20=

    dB

    Acm

    98105

    40log20 4 ==

    27