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Created by H. Erfi Ilyas - erfiilyas@yahoo.com

1

Wilujeng Sumping

di Departemen KetenagalistrikanP4TK Bidang Mesin dan Teknik Industri Bandung

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

PEMROGRAMAN PLC

Prepared by

Erfi Ilyas

Widyaiswara PPPG Teknologi Bandung

Dosen

ISO 9000 Consultant & Auditor

DIKLAT OTOMASI INDUSTRI DENGAN PLCTanggal 30 September s.d 11 Oktober 2013

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Erfi Ilyas Koto

Lahir di Padang Panjang, Sumatera Barat

pada tanggal 24 Juli 1961

Anak pertama dari lima bersaudara

Agama Islam

Alamat Rumah

Komplek Puri Cipageran Indah Blok D 186

Cipageran - Cimahi, 40511

Email : erfiilyas@yahoo.com

Pekerjaan

Widyaiswara

Dosen

ISO 9000 Consultant

Technical Expert /Auditor ISO 9000

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

SD Tamat tahun 1973

Pendidikan Formal

Alamat Kantor

P4TK BMTI (PPPG Teknologi) Bandung

Jl. Pasantren Km 2 Cibabat - Cimahi, 40513

Tel (022) 6652326, 6654698

Email : erfi@tedcbandung.com

SMP Tamat tahun 1976

SMA Tamat tahun 1980

S1 (FPTK IKIP) Tamat tahun 1984

S2 (STIE-IE) Tamat tahun 1999S3 (Doktor Ilmu Ekonomi Unpar Bandung) Tamat tahun 2013

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Tujuan Pembelajaran

1. Mendeskripsikan sistem I/O adressing

2. Menjelaskan jenis-jenis bahasa pemrograman

programmable logic control

3. Membuat program rangkaian dasar (basic circuit)

4. Memprogram berbagai jenis output

5. Memprogram berbagai jenis timer

6. Memprogram berbagai jenis counter

Secara khusus pembelajaran ini bertujuan agar peserta

mampu:

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Lingkup materi PLC

1

2

3

I/O Adressing

Ladder Diagram

Function Block Diagram

4 Statement List

5 Basic Circuit

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Hubungan PLC dengan Mesin Proses

Input

Processing

Output

Contr

oller

Signal transmitter

Mechanics

Actuators Machin

e p

rocess

Manual Commands

Indicators

Human intervention in the control system

Process influencethe control system

Controller indicates result

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Konfigurasi Sistem PLC

Power

Supply

Central

Processing Unit

(CPU)

Memory

Programmer

Program

Output

ModulesInput

Modules

• Motor starters• Lights• Heater• Solenoid valve• Alarms• Relay

• Push button • Switch • Sensor

light, heat temperature position pressure

SENSOR AKTUATOR

PROGRAMMABLE CONTROLLER

• Personal Computer• Programming Terminal• Hand held programmer• Light pen programmer

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Format I/O Addressing

Format Penjelasan

I

O

,

y

z

Input

Output

Bit delimiter

Nomor grup (nomor slot dalam rak)

Nomor chanel (nomor terminal)

I y,z

O y,z

Contoh: I ,1 = input nomor satu pada slot nolO ,2 = output nomor 2 pada slot nol

0

0

1. Input-Output Adressing

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

I/O Adressing berbagai Merek PLC

Input

Output

Bit delimiter

Tele

mecaniq

ue

Modic

on

Allen B

radle

y

Sie

mens S

7

Om

ron

0O ,5

0I ,1 Contoh penulisan

%i1.1

%q2.1

I:1/1

O:6/1

00.01

10.01

0I .1

0Q .5

I i I I 000

O O Qq 010

, . ./

Mitsubis

hi/

LG

X

Y

X1

Y1

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1

2

3

Ladder Diagram (LAD)

Instruction List (IL)

Statement List (STL)

Instruction Set (IS)

Function Block Diagram (FBD)

Function Block Language (FBL)

Bahasa Pemrograman PLC (IEC 61131-3)

4 Sequential Function Chart (SFC)

5 Structured Text (ST)

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1. Ladder Diagram

1.1. Graphic Test Symbol

Links Horizontal

Menghubungkan elemen program secara seri

(input, function block, output)

Vertical

Menghubungkan elemen program secara paralel

(input, function block, output)

Input Normally

Open

Conductive bila sinyal kontrol pada state (keadaan) 1

Normally Closed

Conductive bila sinyal kontrol pada state (keadaan) 0

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1.2. Graphic Action Symbol

Output Direct Aktif bila sinyal kontrol pada state (keadaan) 1

Inverse Tidak aktif bila sinyal kontrol pada state (keadaan) 1

Latched Set output

Men-set bit ke state 1

Unlatched Reset output

Me-reset bit ke state

Jump Bila output ini aktif, maka eksekusi program akan melompat ke label yang diprogramkan pada output ini

( )

( )

( S )

( R )

( J )

0

1. Ladder Diagram

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Simbol output berbagai Merek PLC

Direct

Inverse

Latched

Tele

mecaniq

ue

Modic

on

Allen B

radle

y

Sie

mens

Om

ron

Unlatched

Jump

( )

( )

( S )

( R )

( J )

( )

( )

( S )

( R )

-->>

( )

( L )

( U )

(JMP)

( )

( S )

( I )

( R )

SET

RSET

JMP(JMP)

Mitsubis

hi

( )

[ SET ]

[ RST ]

[ CJ ]

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1.3. Function Block

1

2

3

4

5

Timer

Monostable

Counter

Drum Controller

Register

1. Ladder Diagram

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

E

C

D

R

Ti,v

T

Ti,v

P :

E

C

D

R

Timer – Telemecanique & Modicon

C : input untuk memulai proses timimgE : input untuk memungkinkan preset

time valueD : output bit yang menandakan timer

bekerjaR : output bit yang menandakan timer

mulai berjalan

Timing Diagram

Simbol

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E

C

D

R

Ti,v

T

Ti,v

P :

E

C

D

R

Timer – Telemecanique & Modicon

C : input untuk memulai proses timimgE : input untuk memungkinkan preset

time valueD : output bit yang menandakan timer

bekerjaR : output bit yang menandakan timer

mulai berjalan

Timing Diagram

Simbol

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Timer - Siemens S7

I 0.1T 37

IN TON

PT

LAD STL

LD I 0.1

TON T 37,5

5

Timing Diagram

T 37 (bit)

T 37

(current)

I 0.1

PT=5PT=5

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Timer - Siemens S7

I 0.1T 5

IN TONR

PT

LAD STL

LD I 0.1

TON T 5,5

5

Timing Diagram

T 5 (bit)

T 5

(current)

I 0.1

PT=5

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Timer - Omron

LAD STL

Timing Diagram

TIM 001

# 0050

(current)

000.01

PT=5PT=5

000.01

TIM

001

# 0050

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Timer - Mitsubishi

Timing Diagram

T1

K50

(current)

X1

PT=5PT=5

X1

I IK50

(T1 )

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Timer On-Delay (TON) – Allen Bradley

TON

TIMER ON DELAY

Timer T4:0

Time Base 1.0

Preset 10

Accum 0

(EN)

(DN)

This Bit

accumulated value is equal

to or greater than the preset

value

Is Set WhenAnd Remains Set Until One

of the following

Timer Done Bit DNrung conditions go false

rung conditions are true and

the accumulated value is less

than the preset value

Timer Timing Bit TTrung conditions go false or

when the done bit is set

Timer Enable Bit EN rung conditions are true rung conditions go false

Using Status Bit

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Timer Off-Delay (TOF) – Allen Bradley

TOF

TIMER OFF DELAY

Timer T4:0

Time Base 1.0

Preset 10

Accum 0

(EN)

(DN)

This Bit

rung conditions are true

Is Set WhenAnd Remains Set Until One

of the following

Timer Done Bit DN

rung conditions go false and

the accumulated value is

greater than or equal to the

preset value

rung conditions are false and

the accumulated value is less

than the preset value

Timer Timing Bit TTrung conditions go false or

when the done bit is set

Timer Enable Bit EN rung conditions are true rung conditions go false

Using Status Bit

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T

Ti,v

P :

S R

Monostable – Telemecanique & Modicon

S : input untuk memulai monostabelR : output bit yang menandakan

monostabel running

Timing Diagram

Simbol

S

R

Mi,v

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Counter – Telemecanique

R : input untuk me-reset counter ke nol

P : input untuk mem-preset nilai hitung

(count value)

U : input untuk menjalankan upcounting

D : input untuk menjalankan downcounting

E : output yang menandakan counter empty

D : output yang menandakan counter bekerja

(done)

F : output yang menandakan counter full

Simbol

C0

TB: 1s

P:5

E

D

F

R

P

U

D

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Counter – Modicon

R : input untuk me-reset counter ke nol

S : input untuk mem-preset nilai hitung

(count value)

CU : input untuk menjalankan upcounting

CD : input untuk menjalankan downcounting

E : output yang menandakan counter empty

D : output yang menandakan counter bekerja

(done)

F : output yang menandakan counter full

Simbol

C0

TB: 1s

P:5

E

D

F

R

S

CU

CD

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Counter – Siemens Step 7

CTUDCU

CD

R

PV

I 0.1

I 0.2

I 0.3

4

C48

LAD

LD I 0.1 //Count Up Clock

LD I 0.2 //Count Down Clock

LD I 0.3 //Reset

CTUD C48,4

STL

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I 0.2

Down

I 0.1

Up

I 0.3

Reset

0

1

2

3

4

5

4

3

4

5

C48(Current)

C 48

(bit)

0

Timing Diagram

Counter – Siemens Step 7

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Counter – Omron

000.02

CNT 001 010.01

000.01

CNT

001

# 0005

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X1

I IK5

(C1 )

Counter – Mitsubishi

C1

I I (Y1 )X2

I I [RST C1 ]

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Count Up (CTU) – Allen Bradley

CTU

COUNT UP

Counter C5:0

Preset 10

Accum 0

(CU)

(DN)

Using Status Bit

This Bit

rung conditions are true

Is Set WhenAnd Remains Set Until One

of the following

Timer Done Bit DN

rung conditions go false and

the accumulated value is

greater than or equal to the

preset value

rung conditions are false and

the accumulated value is less

than the preset value

Timer Timing Bit TTrung conditions go false or

when the done bit is set

Timer Enable Bit EN rung conditions are true rung conditions go false

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Drum Controller – Telemecanique

DR

U

FR : input untuk kembali ke step U : input untuk naik ke step berikutnyaF output yang menandakan cycle selesai

(finish)

0

Column F … 4 3 2 1 0

Command bit

Step 0 0 1 0 0 1

1 1 0 0 1 0

2

3

4

0O ,1 0O ,2 0O ,30O ,4 0O ,5

L=5

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Drum Controller – Modicon

DR

U

FR : input untuk kembali ke step U : input untuk naik ke step berikutnyaF output yang menandakan cycle selesai

(finish)

0

Step 0 1 2 3 4 Command

BIT 0 1 0 0 %q2.1

1 0 1 0 %q2.2

2 0 0 1 %q2.3

3 0 0 0 %q2.4

L=5

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SQO

SEQUENCER OUTPUT

File #N7:1

Mask OFOF

Dest O:6.0

Control R6:0

Length 4

Position 0

(EN)

(DN)

Sequencer Output (SQC) – Allen Bradley

Destination O:6.0

0000 0101 0000 1010

0000 1111 0000 1111

15 8 7 0

Mask Value OFOF

15 8 7 0

Sequencer output File #N7:1

0000 0000 0000 0000

1010 0010 1111 0101

1111 0101 0100 1010

0101 0101 0101 0101

0000 1111 0000 1111

Word

N7:1

2

3

4

5

Step

0

1

2

3

4

External Outputs

Associated with O:6

00

01 ON

02

03 ON

04

05

06

07

08 ON

09

10 ON

11

12

13

14

15

Current Step

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Register – Telemecanique & Modicon

R : input untuk me-reset register ke nol

I : input untuk memasukkan word ke register

O : input untuk mengeluarkan word dari register

F : output yang menandakan register full

E : output yang menandakan register empty

Simbol

RF

E

R

I

O

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Basic Circuit

1. Rangkaian YES

I0,1

I IO0,1

( )

Circuit Diagram Ladder Diagram

Tabel Kebenaran

Input

I 0,1

Output

O 0,1

0 0

1 1

S1

K1

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Basic Circuit

2. Rangkaian NOT

I0,2

I/IO0,2

( )

Circuit Diagram Ladder Diagram

Tabel Kebenaran

Input

I 0,3

Output

O 0,3

0 1

1 0

S2

K2

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Basic Circuit

3. Rangkaian AND

Circuit Diagram Ladder Diagram

Tabel Kebenaran

Input

I 0,3

Input

I 0,4

Output

O 0,3

0 0 0

0 1 0

1 0 0

1 1 1

S3

S4

K3

I0,3 I0,4

I I I I O0,3

( )

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Basic Circuit

4. Rangkaian OR

Circuit Diagram Ladder Diagram

Tabel Kebenaran

Input

I 0,5

Input

I 0,6

Output

O 0,4

0 0 0

0 1 1

1 0 1

1 1 1

S5 S6

K4

I0,5

I I O0,4

( )I0,6

I I

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 1.1

Circuit Diagram Ladder Diagram

I0,1 I0,2

O0,1

I0,3

I0,1

I I O0,1

( )I0,2

I I

I0,3

I I

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Latihan 1.2

Circuit Diagram Ladder Diagram

I0,4 I0,5

O0,2

I0,6

O0,2

I0,7

I0,4

I I O0,2

( )I0,5

I I

I0,6

I/I

O0,2

I I

I0,7

I/I

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 1.3

Circuit Diagram Ladder Diagram

O0,3

I0,8

I0,9

I0,10 I0,11

I0,12

I0,10

I I O0,3

( )

I0,12

I I

I0,8

I/I I0,9

I/I I0,11

I/I

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Circuit Diagram Ladder Diagram

I0,13

I0,14

O0,4 O0,5

I0,13 I0,14

I I I I O0,4

( )

O0,5

( )

Latihan 1.4

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2. Function Block Diagram (FBD)

Basic Element

No Designation Simbol dan

Logic Equation Tabel

Kebenaran Keterangan

Identity(YES)

x A

A = x 1

x A

0 0

1

Output A akan logic 1 bila input x logic 1

1

Negation(NOT)

x A

0 1

1 0

Output A akan logic 1 bila input x logic 0 dan sebaliknya

2 x A

A = x

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Basic Element

No Designation Simbol dan

Logic Equation Tabel

Kebenaran Keterangan

AND Output A hanya akan logic 1 bila kedua input x dan y logic 1

3 x A

0 0

0 0

y

1

01

0

0

1 1 1

xA

A = x y

y&

OR Output A akan logic 1 bila salah satu atau kedua input x dan y logic 1

4 x A

0 0

0 1

y

1

01

0

1

1 1 1

xA

A = x V y

y 1

2 Function Block Diagram (FBD)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Basic Element

No Designation Simbol dan

Logic Equation Tabel

Kebenaran Keterangan

Exclusion Output A hanya akan logic 1 bila input x logic 1 dan input y logic 0

5 x A

0 0

0 0

y

1

01

0

1

1 1 0

Inclusion Output A hanya akan logic 0 bila input x logic 0 dan input y logic 1

6 x A

0 1

0 0

y

1

01

0

1

1 1 1

yA

A = x y

x&

yA

A = x V y

x 1

2. Function Block Diagram (FBD)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Basic Element

No Designation Simbol dan

Logic Equation Tabel

Kebenaran Keterangan

NAND Output A hanya akan logic 0 bila kedua input x dan y logic 1

7 x A

0 1

0 1

y

1

01

0

1

1 1 0

NOR Output A hanya akan logic 1 bila kedua input x dan y logic 0

8 x A

0 1

0 0

y

1

01

0

0

1 1 0

xA

A = (xy)

y&

xA

A = (xVy)

y 1

2. Function Block Diagram (FBD)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Stop

Start

K1

K1

I0.1

I0.2

O0.1

O0.1

I0.2

O0.1 1

I0.1

O0.1&

Circuit Diagram Function Block Language

2. Function Block Diagram (FBD)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Function Block Language PLC Lucas Nulle

= Q1 MOTOR

1

&

I 2 START

Q 1 MOTOR

I 1 STOP

Stop

Start

K1

K1

I0.1

I0.2

Q0.1

Q0.1

Circuit Diagram

2. Function Block Diagram (FBD)

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Function Block Language PLC Klockner-Moeller

1

&I 0.1

Q 0.1

I 0.2 Q 0.1

Stop

Start

K1

K1

I0.1

I0.2

O0.1

O0.1

Circuit Diagram

2. Function Block Diagram (FBD)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Function Block Language PLC Siemens (STEP 7-Micro/Win 3.2

OR

I 0.1

Q 0.1

I 0.2 Q 0.1

Stop

Start

K1

K1

I0.1

I0.2

O0.1

O0.1

Circuit Diagram

2. Function Block Diagram (FBD)

AND

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Latihan 2.1

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 2.2

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

3. Instruction List (IL)

Adress Seluruh instruksi yang diberikan akan

menerima nomor lokasi memory (adress).

PLC melaksanakan instruksi sesuai dengan

adress yang diminta. Adress ini biasanya

dinyatakan dalam angka dan menggunakan

tiga digit

Misal: 000 instruksi pertama001 instruksi kedua002 instruksi ke tiga

dan seterusnya

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Operation Operation memberitahukan pada PLC apa yang harus

dilakukan, membaca status sinyal, penentuan tipe

rangkaian seri atau paralel atau penetapan lokasi hasil dari

rangkaian

Misal: LI0.1 Load status sinyal dari input 0.1 ke dalam

working register

OI0.2 Input 0.2 terhubung paralel dengan

input 0.1 (rangkaian OR)

=Q0.1 Lokasi hasil rangkaian adalah pada

output 0.1

Jenis-jenis operation yang lain diantaranya adalah:

L : Load

A : AND

O : OR

XO : Exclusive OR

= : Allocation

3. Instruction List (IL)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Operand Kalau operation menyatakan apa yang harus

dilakukan, maka operand menyatakan dengan

apa instruksi itu harus dilaksanakan. Dari contoh

di atas yang menjadi operand adalah input 0.1,

input 0.2 dan output 0.1. Untuk mengidentifikasi

jenis operand digunakan notasi sebagai berikut:

… N : Negation

I : Input

Q : Output

M : Marker

3. Instruction List (IL)

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Adress

(lokasi memory)

Diagram Instruksi Instruction List (IL)

Operation Operand

Instruksi

(isi lokasi memory)

Identifikasi

Tipe Operand Parameter

No Operand

Program

terdiri dari

6 instruksi

L = Load

atau baca

status input

I = Input Nomor

unit/slot

Nomor

terminal

005 L I 0.1

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Notasi IL berbagai Merek PLC

Load

OR

AND

Klo

cner

MPS3

AEG

BBC –

Pr

b

Sie

me

ns S

7

Om

ron

=

N Negation N

=

N

=

AND

NNOT

OUT

L U ! LOAD LD

O / ORO OR

A U AND&

Mitsubis

hi

Modic

on

=

Input

Output

I

Q

E

A

E

A

X

Y

LD

ST

I

Q

O

A

N

=

I

Q

LD

OR

AND

NOT

OUT

000

010

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Contoh Pemograman dengan Instruction List

K1

Stop I0.2

Q0.1

Start K1I0.1

Q0.1

Circuit Diagram

Klockner Moeller

L I 0.1

O Q0.1

AN I 0.2

= Q0.1

A E G

U E1

O A1

UN E2

= A1

B B C

! E02,01

/ A07,01

&N E02,02

= A07,01

Mitsubishi

LD X001

OR Y030

ANDI X002

= Y030

Statement List

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Contoh Pemograman dengan Instruction List

K1

Stop I0.2

O0.1

Start K1I0.1

O0.1

Circuit Diagram

Modicon

LD % I1.1

OR %Q2.1

ANDN % I1.2

ST %Q2.1

Siemens

LD I0.1

O Q0.1

AN I0.2

= Q0.1

Omron

LD 000.01

OR 010.01

ANDNOT 000.02

OUT 010.01

Statement List

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 3.1

Circuit Diagram Statement List

I1.1 I1.2

Q2.1

I1.3

Q2.1

I1.4

ModiconLD %I1.1OR %I1.2OR %Q2.1ANDN %I1.3ANDN %I1.4ST %Q2.1

SiemensNetwork //Percb 1LD I0.1O I0.2O Q0.1AN I0.3AN I0.4= Q0.1Network //Akhir ProgMEND

OmronLD 000.01OR 000.02OR 010.01ANDNOT 000.03ANDNOT 000.04OUT 010.01END

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 3.2

Circuit Diagram Statement List

O0,3

I0,8

I0,9

I0,10 I0,11

I0,12

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Latihan 3.3

Circuit Diagram Statement List

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

TERIMAKASIH

اَلُم َعَلْيُكْم َورَْحَمُة اهلِل َوبَ رََكاتُهُ ْالسَّ

Created by H. Erfi Ilyas - erfiilyas@yahoo.com

Let me do it

And I will understand

Tell me and I forgot

Show it to me and I will remember

(Confuzius)

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